Study and Simulation of SOI n-MOSFET Transistor Single Gate using SILVACO Software

MOS Technology on massive substrate played a critical task during micro-electronic evolution. The regular reduction of transistors sizes leads today to nanometric devices. With this reduction, some parasitic physical effects, previously with no importance, became mostly amplified, leading to the end of MOSFETs technology on massive substrate. SOI technology gives a good alternative to that miniaturization. SOI technology allows the reduction of short channel effects that appear in nanometer devices (under 50nm node) and also allows micro-electronic evolution to continue. In this paper, we present simulation results we obtained using SILVACO TCAD tools relating to SOI n-MOSFET structures we have consider. We will also exhibit some simulation results we obtained relating to the influence of some parameters variation on our structure, that having a direct impact on their drain current.